Be a changemaker in the world of semiconductors

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As we work towards our 2030 goal of positioning Sarawak as a high-value-added semiconductor hub of the region, we are also fully committed to promoting a healthy work environment in accordance with the SDG goal 8 of Decent Work and Economic Growth and the SDG goal 5 of Gender Equality.

Staff Analog IC Design Engineer
  • Kuala Lumpur / Penang
  • Engineering / Electronics
Job Highlights
  • We offer a competitive salary and benefits package
  • Opportunities for professional growth and development
Job Summary

The Staff Analog IC Design Engineer will be responsible for designing, developing and verifying analog IPs using CMOS / BCD / HV technology. In addition to the design work, he/she will be involved in the supervision of layout work, and customer support on IP design services

Job Responsibilities
  • Work with business teams and system level engineers to define mutually agreeable specifications on the system level
  • Providing high-level analysis of chip architecture tradeoffs, Analog and IO placements, Digital/SRAM block placements, and selection of the right memory to ensure the best solution for a given product based on the specifications given
  • Responsible to design and integrate the analog building blocks into bigger systems for example: POR, ADC, DAC, LDO, PLL, Temperature Sensors, DC-DC converters using industry EDA tools (Cadence, Mentor, or Synopsys)
  • Supervise IC layouts to achieve the optimal design performance vs area
  • Write Verilog-A behavioral models for quick simulation, prototyping and analysis
  • Support the Mixed Signal Design Engineer with top level simulations to ensure the correct integration of analog, digital and software components
  • Participate in design reviews and create the necessary design and product documentation
  • Work together with the Product Verification Engineers to perform lab evaluation and validation of complex ICs
  • Collaborate with Test Solution Development Engineers to ensure the design to be fully and efficiently tested
  • Support Root Cause and Failure Analysis investigations
  • Stay up to date with the latest trends and developments in the semiconductor industry and leverage that knowledge to improve the design process and product offerings
  • Work with multi-disciplinary and international project team members
  • Responsible to develop and mentor junior engineers
Job Requirements
  • Engineering degree in Electronics, Physics or other related fields
  • Knowledge of CMOS process and devices parasitics
  • Minimum 8 years of experience designing analog block design such as bandgap references, LDO regulators, amplifiers, comparators, VCOs
  • Experience with various analog circuit design techniques, such as noise analysis, stability analysis, and feedback analysis
  • Hands-on experience with EDA tools such as Cadence, Synopsys, Siemens
  • Knowledge of Verilog A/AMS modeling is considered a plus
  • Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC)
  • Familiar with 6-sigma design practices and good understanding of statistical analysis
  • Excellent written and oral communications skills
  • Able to work independently on complex technical and/or engineering tasks
  • Flexible to respond to dynamic work and customer needs
  • Team player, passionate about technology, solution driven
  • Self-motivated and able to take full responsibility for solutions
  • Proven skills in project management and project lead
  • Travel may be required for design reviews and collaboration with global teams
Career Level

Manager

Years of Experience

8 years

Qualification

Bachelor's Degree, Post Graduate Diploma, Professional Degree

Job Type

Full-Time

Senior Custom Layout Engineer
  • Malaysia
  • Engineering / Electronics
Job Highlights
  • We offer a competitive salary and benefits package
  • Opportunities for professional growth and development
Job Summary

We are seeking an experienced Custom Layout Engineer to join our dynamic team. The successful candidate will be responsible for the design and layout of high-performance analog and mixed-signal circuits

Job Responsibilities
  • Work closely with circuit designers to understand circuit specifications and constraints, and develop layout plans accordingly
  • Perform top-level and block-level layout design and verification of complex analog and mixed-signal circuits, including but not limited to amplifiers, ADCs, DACs, bandgap references, LDO regulators, comparators, VCOs, high power drivers and PLLs
  • Conduct layout design optimization and design rule checking to ensure high-quality layouts that meet performance, power, and area requirements
  • Collaborate with CAD engineers and designers to develop and implement layout design methodologies, automation flows, and tool scripts
  • Provide technical guidance and mentorship to junior layout designers, and participate in peer reviews to ensure high-quality designs
  • Participate in design reviews and create the necessary report and design documentation
  • Work with multi-disciplinary and international project team members
Job Requirements
  • Bachelor's or Master's degree in Electrical & Electronics Engineering or related field
  • Minimum 3 years of experience designing analog layout block design such as bandgap references, LDO regulators, amplifiers, comparators, VCOs
  • Minimum 5 years of experience in analog and mixed-signal layout design, with a proven track record of successful tapeouts in advanced technology nodes
  • Proficiency in industry-standard layout tools, such as Cadence Virtuoso, PVS, Mentor Graphics Calibre and Synopsys Custom Compiler, IC Validator
  • Familiarity with scripting languages, such as Skill, Python, Tcl, and Perl
  • Knowledge of CMOS process and devices parasitics
  • Experience with various analog layout design techniques such as matching, symmetry, shielding, and floor planning
  • Excellent written and oral communications skills
  • Able to work independently on complex technical and/or engineering tasks
  • Flexible to respond to dynamic work and customer needs
  • Team player, passionate about technology, solution driven
  • Self-motivated and able to take full responsibility for solutions
  • Travel may be required for design reviews and collaboration with global teams
Career Level

Senior Executive / Manager

Years of Experience

5 years

Qualification

Bachelor's Degree, Post Graduate Diploma, Master's Degree

Job Type

Full-Time

Senior Analog IC Design Engineer
  • Kuala Lumpur / Penang
  • Engineering / Electronics
Job Highlights
  • We offer a competitive salary and benefits package
  • Opportunities for professional growth and development
Job Summary

The Senior Analog IC Design Engineer will be responsible to perform independent design of IPs using CMOS / BCD / HV technology. In addition to the design work, he/she will be involved in the supervision of layout work, and customer support on IP design services

Job Responsibilities
  • Responsible to design and integrate the analog building blocks into bigger systems for example: POR, ADC, DAC, LDO, PLL, Temperature Sensors, DC-DC converters
  • Use industry EDA tools (Cadence, Mentor, or Synopsys) for schematic capture and simulation setup to analyze and perform pre and post-layout simulations of the analog basic building blocks across PVT
  • Supervise IC layouts to achieve the optimal design performance vs area
  • Able to write Verilog-A behavioral models for quick simulation and prototyping and analysis
  • Support the Mixed Signal Design Engineer with top level simulations to ensure the correct integration of analog, digital and software components
  • Work together with the Product Verification Engineers to perform lab evaluation and validation of complex ICs
  • Collaborate with Test Engineers to ensure that the design can be efficiently and fully tested in production
  • Participate in design reviews and create the necessary design and product documentation
  • Support Root Cause and Failure Analysis investigations
  • Work with multi-disciplinary and international project team members
Job Requirements
  • Engineering degree in Electronics, Physics or other related fields
  • Knowledge of CMOS process and devices parasitics
  • More than 5 years of experience designing analog block design such as bandgap references, LDO regulators, amplifiers, comparators, VCOs
  • Experience with various analog circuit design techniques, such as noise analysis, stability analysis, and feedback analysis
  • Hands-on experience with EDA tools such as Cadence, Synopsys, Siemens
  • Knowledge of Verilog A/AMS modeling is considered a plus
  • Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC)
  • Familiar with 6-sigma design practices and good understanding of statistical analysis
  • Excellent written and oral communications skills
  • Able to work independently on complex technical and/or engineering tasks
  • Flexible to respond to dynamic work and customer needs
  • Team player, passionate about technology, solution driven
  • Self-motivated and able to take full responsibility for solutions
  • Travel may be required for design reviews and collaboration with global teams
Career Level

Senior Executive 

Years of Experience

5 years

Qualification

Bachelor's Degree, Professional Degree, Master's Degree

Job Type

Full-Time

Senior RTL Verification Engineer
  • Kuala Lumpur
  • Engineering / Electronics
Job Highlights
  • We offer a competitive salary and benefits package
  • Opportunities for professional growth and development
 
Job Summary

Responsible to guarantee the functional correctness and high quality of complex digital IC designs (written in RTL) before they are committed to silicon. This position offers the opportunity to work on advanced digital designs, focusing on verifying RTL designs for complex systems. While a strong background in RTL verification is essential, familiarity with microcontroller SoC architectures, including RISC-V or ARM, is a plus.

Responsibilities
  • Develop and implement testbenches for RTL designs using industry-standard verification methodologies (e.g., UVM, SystemVerilog).
  • Collaborate with RTL design engineers to understand design specifications and create comprehensive verification plans.
  • Perform RTL simulations and debug design issues, working to ensure the correctness and functionality of the design.
  • Develop and execute functional coverage models, identifying potential gaps in verification and ensuring full verification of the RTL.
  • Collaborate with cross-functional teams to troubleshoot and resolve design or verification issues.
  • Analyze simulation results and work with the design team to resolve failing test cases and identify root causes.
  • Assist in the integration of microcontroller SoC components, including CPU cores, memory interfaces, and peripherals (basic knowledge of SoC design such as RISC-V or ARM is an advantage).
  • Stay current with industry trends and verification methodologies, particularly those related to microcontroller SoC and processor designs.
 
Requirements
  • Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering, or related fields.
  • Minimum of 5 years of experience in verification of RTL designs using SystemVerilog/Verilog and UVM.
  • Strong understanding of digital design principles, including timing, functionality, and logic verification.
  • Experience with simulation tools (e.g., ModelSim, VCS, Questa) and waveform analysis.
  • Familiarity with microcontroller or SoC design concepts (e.g., RISC-V, ARM) is a plus but not required.
  • Strong debugging and problem-solving skills.
  • Good knowledge of verification planning, including coverage-driven verification techniques.
  • Excellent written and verbal communication skills, with the ability to work effectively in a team environment.
  • Experience with scripting languages (e.g., Python, Perl, TCL) is a plus.
  • Hands-on experience with SoC or microcontroller verification, including peripheral interfaces, memory subsystems, and CPU cores.
  • Familiarity with ARM or RISC-V processor cores and their associated instruction sets.
  • Knowledge of hardware/software co-verification or embedded systems.
  • Experience in automation of testbenches and regression suites.
Career Level

Senior Executive 

Years of Experience

5 years

Qualification

Bachelor's Degree, Master's Degree

Job Type

Contract/Temp

Senior RTL Design Engineer
  • Kuala Lumpur
  • Engineering / Electronics
Job Highlights
  • We offer a competitive salary and benefits package
  • Opportunities for professional growth and development
 
Job Summary

Responsible for the micro-architectural design, RTL implementation, verification, and synthesis of complex digital circuits. You will have the opportunity to contribute to cutting-edge projects and work alongside a team of talented engineers in a collaborative and innovative environment. The ideal candidate should have strong experience in RTL design, using languages such as Verilog/System Verilog/VHDL, with a fundamental understanding of microcontroller SoC architectures, including RISC-V or ARM.

Responsibilities
  • Develop RTL code in Verilog or VHDL for digital circuits, including but not limited to CPU cores, memory controllers, and peripheral interfaces.
  • Collaborate closely with architects to translate architectural specifications into efficient and high-performance RTL code.
  • Integrate various components of a digital system, ensuring compatibility and performance optimization.
  • Collaborate with cross-functional teams (software, verification, hardware) to ensure successful product delivery.
  • Assist in the design, synthesis, and timing analysis of digital systems.
  • Contribute to the development of block-level and chip-level design documentation.
  • Perform simulation, debugging, and performance analysis of RTL designs to ensure correctness and efficiency.
  • Support RTL design verification activities, working with the verification team to create testbenches and validate designs.
  • Stay updated with emerging microcontroller SoC trends and architectures, including knowledge of RISC-V and ARM designs.
 
Requirements
  • Bachelor’s or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or related fields.
  • Minimum of 5 years of experience in RTL design and implementation using SystemVerilog Verilog/VHDL.
  • Strong understanding of digital design principles, including timing analysis, logic design, and synthesis.
  • Familiarity with design tools (e.g., Synopsys, Cadence, Xilinx) for synthesis, simulation, and debugging).
  • Basic knowledge of microcontroller or SoC architectures (e.g., RISC-V, ARM) is a plus.
  • Excellent problem-solving, debugging and analytical skills.
  • Strong communication skills and ability to work collaboratively in a team environment.
  • Familiarity with FPGA or ASIC design flows is a plus.
  • Hands-on experience with SoC or microcontroller design, including integration of peripherals and memory subsystems.
  • Knowledge of ARM/RISC-V vector extensions, custom extensions, or the ARM/RISC-V Privileged Architecture
  • Familiarity with ARM or RISC-V instruction set architecture (ISA) and microarchitecture.
  • Understanding of ARM-based hardware security (e.g., TrustZone, Secure Boot).
  • Familiarity with functional safety standards and practices (e.g., ISO 26262, IEC 61508).
  • Experience with embedded systems or low-level programming for microcontrollers.
  • Exposure to hardware/software co-design.
Career Level

Senior Executive 

Years of Experience

5 years

Qualification

Bachelor's Degree, Master's Degree

Job Type

Contract/Temp

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